发明申请
US20110022774A1 CACHE MEMORY CONTROL METHOD, AND INFORMATION STORAGE DEVICE COMPRISING CACHE MEMORY
审中-公开
高速缓存存储器控制方法和包含高速缓存存储器的信息存储设备
- 专利标题： CACHE MEMORY CONTROL METHOD, AND INFORMATION STORAGE DEVICE COMPRISING CACHE MEMORY
- 专利标题（中）： 高速缓存存储器控制方法和包含高速缓存存储器的信息存储设备
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申请号： US12784159申请日： 2010-05-20
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公开(公告)号： US20110022774A1公开(公告)日： 2011-01-27
- 发明人: Kazuya TAKADA , Kenji YOSHIDA
- 申请人： Kazuya TAKADA , Kenji YOSHIDA
- 申请人地址： JP Tokyo
- 专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址： JP Tokyo
- 优先权： JP2009-171373 20090722
- 主分类号： G06F12/08
- IPC分类号： G06F12/08 ; G06F12/00
摘要：
According to a cache memory control method of an embodiment, a data write position in a segment of a cache memory is changed to an address to which a lower bit of a logical block address of write data is added as an offset. Then, even if writing is completed within the segment of the cache memory, the remaining regions of the segment is not wasted.
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