Invention Application
- Patent Title: METHOD FOR FABRICATING SEMICONDUCTOR STRUCTURE
- Patent Title (中): 制造半导体结构的方法
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Application No.: US12907016Application Date: 2010-10-18
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Publication No.: US20110034019A1Publication Date: 2011-02-10
- Inventor: Chih-Hao Yu , Li-Wei Cheng , Che-Hua Hsu , Tian-Fu Chiang , Cheng-Hsien Chou , Chien-Ming Lai , Yi-Wen Chen , Chien-Ting Lin , Guang-Hwa Ma
- Applicant: Chih-Hao Yu , Li-Wei Cheng , Che-Hua Hsu , Tian-Fu Chiang , Cheng-Hsien Chou , Chien-Ming Lai , Yi-Wen Chen , Chien-Ting Lin , Guang-Hwa Ma
- Main IPC: H01L21/28
- IPC: H01L21/28

Abstract:
A method for fabricating a semiconductor structure is disclosed. A substrate with a first transistor having a first dummy gate and a second transistor having a second dummy gate is provided. The conductive types of the first transistor and the second transistor are different. The first and second dummy gates are simultaneously removed to form respective first and second openings. A high-k dielectric layer, a second type conductive layer and a first low resistance conductive layer are formed on the substrate and fill in the first and second openings, with the first low resistance conductive layer filling up the second opening. The first low resistance conductive layer and the second type conductive layer in the first opening are removed. A first type conductive layer and a second low resistance conductive layer are then formed in the first opening, with the second low resistance conductive layer filling up the first opening.
Public/Granted literature
- US08193050B2 Method for fabricating semiconductor structure Public/Granted day:2012-06-05
Information query
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