A QFN package includes a die attach pad having a recessed area; a semiconductor die mounted inside the recessed area; an inner terminal lead disposed adjacent to the die attach pad; a first wire bonding the inner terminal lead to the semiconductor die; an outer terminal lead; an intermediary terminal disposed between the inner terminal lead and the outer terminal lead; a second wire bonding the intermediary terminal to the semiconductor die; and a third wire bonding the intermediary terminal to the outer terminal lead. A circuit board includes a core layer; a first metal trace disposed over a first side of the core layer; and a first solder mask covering the first metal trace. The QFN package is mounted over the first solder mask. No metal pad of the first metal trace is formed within an area corresponding to the intermediary terminal.