发明申请
US20110108958A1 Metal Oxide Semiconductor (MOS)-Compatible High-Aspect Ratio Through-Wafer Vias and Low-Stress Configuration Thereof 失效
金属氧化物半导体(MOS) - 兼容的高宽比通过晶片通孔和低应力配置

Metal Oxide Semiconductor (MOS)-Compatible High-Aspect Ratio Through-Wafer Vias and Low-Stress Configuration Thereof
摘要:
A structure includes a wafer having a top wafer surface. The wafer defines an opening. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The wafer has a thickness in the first reference direction. The structure also includes a through-wafer via formed in the opening. The through-wafer via has a shape, when viewed in a plane perpendicular to the first reference direction and parallel to the top wafer surface, of at least one of a spiral and a C-shape. The through-wafer via has a height in the first reference direction essentially equal to the thickness of the wafer in the first reference direction. Manufacturing techniques are also disclosed.
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