发明申请
US20110121874A1 Systems and Methods for PLL Linearity Measurement, PLL Output Duty Cycle Measurement and Duty Cycle Correction 有权
PLL线性度测量,PLL输出占空比测量和占空比校正的系统和方法

Systems and Methods for PLL Linearity Measurement, PLL Output Duty Cycle Measurement and Duty Cycle Correction
摘要:
Systems and methods for enabling the determination of voltage controlled oscillator (VCO) linearity, duty cycle determination and duty cycle correction in phase locked loop circuits (PLL's.) One embodiment comprises a method including the steps of determining the frequency response of a PLL's VCO as a function of duty cycle, applying a signal based on the VCO output to the VCO input, measuring the resulting frequency of the VCO output signal, determining the duty cycle corresponding to the measured frequency, and configuring a duty cycle correction unit correct the duty cycle of the VCO output signal to about 50%. Determining the frequency response of the VCO may include, for each of several different duty cycle values between 0% and 100%, applying the VCO input signal to the VCO and determining the corresponding frequency of the VCO output signal. This may also be done for duty cycles of 0% and 100%.
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