发明申请
- 专利标题: METHOD OF VERTICALLY MOUNTING AN INTEGRATED CIRCUIT
- 专利标题(中): 垂直安装集成电路的方法
-
申请号: US12645749申请日: 2009-12-23
-
公开(公告)号: US20110147867A1公开(公告)日: 2011-06-23
- 发明人: Jon Slaughter , Phillip Mather
- 申请人: Jon Slaughter , Phillip Mather
- 申请人地址: US AZ Chandler
- 专利权人: EVERSPIN TECHNOLOGIES, INC.
- 当前专利权人: EVERSPIN TECHNOLOGIES, INC.
- 当前专利权人地址: US AZ Chandler
- 主分类号: H01L27/20
- IPC分类号: H01L27/20 ; H01L21/98 ; H01L21/50
摘要:
A method of mounting a first integrated circuit (102, 500, 704) on one of a circuit board (300, 700) or a second integrated circuit (706), the first integrated circuit (102, 500, 704) formed over a substrate (104) and having a surface (119) opposed to the substrate (104) and a side (122, 530, 930) substantially orthogonal to the surface (119), and including a conductive element (116, 117, 118, 522, 524, 526, 528, 528′, 528″) coupled to circuitry (102, 500, 704) and formed within a dielectric material (120, 518), the one of the circuit board (300, 700) or the second integrated circuit (706) including a contact point (304, 306, 314), the method including singulating (1104) the first integrated circuit (102, 500, 704) to expose the conductive element (116, 117, 118, 522, 524, 526, 528, 528′, 528″) on the side (222, 630, 1030), and mounting (1108) the first integrated circuit (102, 500, 704) on the one of a circuit board (300, 700) or a second integrated circuit (706) by aligning the conductive element (116, 117, 118, 522, 524, 526, 528, 528′, 528″) exposed on the side (222, 630, 1030) to make electrical contact with the contact point (304, 306, 314).
信息查询
IPC分类: