发明申请
- 专利标题: ENHANCED CONFINEMENT OF HIGH-K METAL GATE ELECTRODE STRUCTURES BY REDUCING MATERIAL EROSION OF A DIELECTRIC CAP LAYER UPON FORMING A STRAIN-INDUCING SEMICONDUCTOR ALLOY
- 专利标题(中): 通过减少电介质层的材料腐蚀形成应变诱导半导体合金来增强高K金属电极结构的增强
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申请号: US12909149申请日: 2010-10-21
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公开(公告)号: US20110159654A1公开(公告)日: 2011-06-30
- 发明人: Stephan Kronholz , Markus Lenski , Andy Wei , Martin Gerhardt
- 申请人: Stephan Kronholz , Markus Lenski , Andy Wei , Martin Gerhardt
- 优先权: DE102009055435.1 20091231
- 主分类号: H01L21/336
- IPC分类号: H01L21/336
摘要:
When forming the strain-inducing semiconductor alloy in one type of transistor of a sophisticated semiconductor device, superior thickness uniformity of a dielectric cap material of the gate electrode structures may be achieved by forming encapsulating spacer elements on each gate electrode structure and providing an additional hard mask material. Consequently, in particular, in sophisticated replacement gate approaches, the dielectric cap material may be efficiently removed in a later manufacturing stage, thereby avoiding any irregularities upon replacing the semiconductor material by an electrode metal.
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