发明申请
- 专利标题: FLIP CHIP MOUNTING METHOD AND BUMP FORMING METHOD
- 专利标题(中): FLIP芯片安装方法和BUMP形成方法
-
申请号: US13091801申请日: 2011-04-21
-
公开(公告)号: US20110201195A1公开(公告)日: 2011-08-18
- 发明人: Takashi KITAE , Seiichi NAKATANI , Seiji KARASHIMA , Yoshihisa YAMASHITA , Takashi ICHIRYU
- 申请人: Takashi KITAE , Seiichi NAKATANI , Seiji KARASHIMA , Yoshihisa YAMASHITA , Takashi ICHIRYU
- 申请人地址: JP Osaka
- 专利权人: PANASONIC CORPORATION
- 当前专利权人: PANASONIC CORPORATION
- 当前专利权人地址: JP Osaka
- 优先权: JP2005-109645 20050406
- 主分类号: H01L21/283
- IPC分类号: H01L21/283
摘要:
The invention involves mounting a solder resin composition (6) including a solder powder (5a) and a resin (4) on the first electronic component (2); arranging such that the connecting terminals (3) of the first electronic component (2) and the electrode terminals (7) of the second electronic component (8) are facing each other; ejecting a gas (9a) from a gas generation source (1) included in the first electronic component (2) by heating the first electronic component (2) and the solder resin composition; and inducing the flow of the solder powder (5a) in the solder resin composition (6) by inducing convection of the gas (9a) in the solder resin composition (6), and electrically connecting the connecting terminals (3) and the electrode terminals (7) by self-assembly on the connecting terminals (3) and the electrode terminals (7). Through this are provided a flip chip packaging method that enables connecting, with high connection reliability, electrode terminals of a semiconductor chip wired with narrow pitch and connecting terminals of a circuit board, and a bump formation method for packaging on a circuit board.
公开/授权文献
- US08283246B2 Flip chip mounting method and bump forming method 公开/授权日:2012-10-09
信息查询
IPC分类: