Invention Application
- Patent Title: Architectures and methods for code combiners
- Patent Title (中): 代码组合器的架构和方法
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Application No.: US12660615Application Date: 2010-03-02
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Publication No.: US20110216852A1Publication Date: 2011-09-08
- Inventor: Rajendra Kumar
- Applicant: Rajendra Kumar
- Main IPC: H04L27/20
- IPC: H04L27/20 ; G06F7/00 ; H04L27/00

Abstract:
Various embodiments are directed to systems and methods for combining a plurality of codes. The plurality of codes may be binary codes having possible logical values of −1 and +1 and may comprise an even number of codes. An output of the combining v0,k may be given by: v0=sgn(vi), where vi is the sum of the first plurality of codes at the first time. Embodiments for allocating different power levels among various codes are presented.
Public/Granted literature
- US08982924B2 Architectures and methods for code combiners Public/Granted day:2015-03-17
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