发明申请
US20110220405A1 METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD AND MULTILAYER PRINTED WIRING BOARD 审中-公开
制造多层印刷线路板和多层印刷线路板的方法

  • 专利标题: METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD AND MULTILAYER PRINTED WIRING BOARD
  • 专利标题(中): 制造多层印刷线路板和多层印刷线路板的方法
  • 申请号: US12961003
    申请日: 2010-12-06
  • 公开(公告)号: US20110220405A1
    公开(公告)日: 2011-09-15
  • 发明人: Kazuhisa TSUNOI
  • 申请人: Kazuhisa TSUNOI
  • 申请人地址: JP KAWASAKI
  • 专利权人: FUJITSU LIMITED
  • 当前专利权人: FUJITSU LIMITED
  • 当前专利权人地址: JP KAWASAKI
  • 优先权: JP2010-52600 20100310
  • 主分类号: H05K1/11
  • IPC分类号: H05K1/11 H05K3/36
METHOD FOR MANUFACTURING MULTILAYER PRINTED WIRING BOARD AND MULTILAYER PRINTED WIRING BOARD
摘要:
A method for manufacturing a multilayer printed wiring board, the method includes forming a group of first through holes in a first insulating substrate; forming a group of second through holes in a second insulating substrate that has the same shape and the same size as a shape and a size, respectively, of the first insulating substrate, the second through holes having the same shape and the same size as a shape and a size, respectively, of the first through holes and being formed at the same positions as positions at which the first through holes are formed. At least one of the first through holes is filled with a first conductive member and at least one of the second through holes is filled with a second conductive member. And stacking the first insulating substrate and the second insulating substrate together.
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