An inverter circuit including: first to third transistors; first and second switches; and a first capacitive element. The first and second transistors are connected in series between a first voltage line and a second voltage line. The third transistor is connected between the second voltage line and a gate of the second transistor. The first and second switches are connected in series between a voltage supply line and a gate of the third transistor, and are turned on/off alternately to prevent the first and second switches from simultaneously turning ON. One end of the first capacitive element is connected to a node between the first and second switches. Off-state of the first transistor allows a predetermined fixed voltage to be supplied from the voltage supply line to the gate of the second transistor, via the first switch, the one end of the first capacitive element and the second switch.