发明申请
- 专利标题: EMBEDDED DRAM FOR EXTREMELY THIN SEMICONDUCTOR-ON-INSULATOR
- 专利标题(中): 嵌入式超薄型半导体绝缘体DRAM
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申请号: US12776829申请日: 2010-05-10
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公开(公告)号: US20110272762A1公开(公告)日: 2011-11-10
- 发明人: Roger A. Booth, JR. , Kangguo Cheng , Joseph Ervin , Ali Khakifirooz , Chengwen Pei , Ravi M. Todi , Geng Wang
- 申请人: Roger A. Booth, JR. , Kangguo Cheng , Joseph Ervin , Ali Khakifirooz , Chengwen Pei , Ravi M. Todi , Geng Wang
- 申请人地址: US NY Armonk
- 专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人: INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L29/786
- IPC分类号: H01L29/786 ; H01L21/336
摘要:
A node dielectric and a conductive trench fill region filling a deep trench are recessed to a depth that is substantially coplanar with a top surface of a semiconductor-on-insulator (SOI) layer. A shallow trench isolation portion is formed on one side of an upper portion of the deep trench, while the other side of the upper portion of the deep trench provides an exposed surface of a semiconductor material of the conductive fill region. A selective epitaxy process is performed to deposit a raised source region and a raised strap region. The raised source region is formed directly on a planar source region within the SOI layer, and the raised strap region is formed directly on the conductive fill region. The raised strap region contacts the raised source region to provide an electrically conductive path between the planar source region and the conductive fill region.
公开/授权文献
- US08455875B2 Embedded DRAM for extremely thin semiconductor-on-insulator 公开/授权日:2013-06-04
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