发明申请
- 专利标题: CURRENT-SWITCHING CELL AND DIGITAL-TO-ANALOG CONVERTER
- 专利标题(中): 电流切换单元和数字到模拟转换器
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申请号: US13145782申请日: 2010-01-28
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公开(公告)号: US20110273317A1公开(公告)日: 2011-11-10
- 发明人: Munehiko Nagatani , Hideyuki Nosaka , Shogo Yamanaka , Kimikazu Sano , Koichi Murata
- 申请人: Munehiko Nagatani , Hideyuki Nosaka , Shogo Yamanaka , Kimikazu Sano , Koichi Murata
- 优先权: JP2009-017697 20090129
- 国际申请: PCT/JP2010/051157 WO 20100128
- 主分类号: H03M1/66
- IPC分类号: H03M1/66 ; H03K17/60 ; H03K17/687
摘要:
Two D flip-flops (D-FFMA, D-FFMB) output two half-rate signals (DMR-A, DMR-B) by dividing a digital input signal (DM) into two signals and retiming them based on a clock signal (CLK) and a negative-phase clock signal (CLKB). First and second switches (SM1, SM2) are driven by the two half-rate signals (DMR-A, DMR-B). Third and fourth switches (SM3, SM4) are driven by a select signal SW and a negative-phase select signal SWB that have the same frequency as that of the clock signal TO (CLK) but a different phase from that of the clock signal (CLK). The current supplied from a current source (1) to a load (4) thus becomes a current signal corresponding to a conversion frequency twice the frequency of the clock signal (CLK).
公开/授权文献
- US08493257B2 Current-switching cell and digital-to-analog converter 公开/授权日:2013-07-23