发明申请
US20110275186A1 FABRICATING AND OPERATING A MEMORY ARRAY HAVING A MULTI-LEVEL CELL REGION AND A SINGLE-LEVEL CELL REGION
有权
制作和操作具有多层次细胞区域和单层细胞区域的记忆阵列
- 专利标题： FABRICATING AND OPERATING A MEMORY ARRAY HAVING A MULTI-LEVEL CELL REGION AND A SINGLE-LEVEL CELL REGION
- 专利标题（中）： 制作和操作具有多层次细胞区域和单层细胞区域的记忆阵列
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申请号： US13187399申请日： 2011-07-20
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公开(公告)号： US20110275186A1公开(公告)日： 2011-11-10
- 发明人: Fumitoshi Ito , Shinji Sato
- 申请人： Fumitoshi Ito , Shinji Sato
- 主分类号： H01L21/336
- IPC分类号： H01L21/336 ; H01L21/76
摘要：
Techniques are disclosed herein for applying different process steps to single-level cell (SLC) blocks in a memory array than to multi-level cell (MLC) blocks such that the SLC blocks will have high endurance and the MLC blocks will have high reliability. In some aspects, different doping is used in the MLC blocks than the SLC blocks. In some aspects, different isolation is used in the MLC blocks than the SLC blocks. Techniques are disclosed that apply different read parameters depending on how many times a block has been programmed/erased. Therefore, blocks that have been cycled many times are read using different parameters than blocks that have been cycled fewer times.
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