发明申请
US20110278736A1 Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP
有权
用于形成3-D FO-WLCSP的垂直互连结构的半导体器件和方法
- 专利标题： Semiconductor Device and Method of Forming a Vertical Interconnect Structure for 3-D FO-WLCSP
- 专利标题（中）： 用于形成3-D FO-WLCSP的垂直互连结构的半导体器件和方法
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申请号： US13191318申请日： 2011-07-26
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公开(公告)号： US20110278736A1公开(公告)日： 2011-11-17
- 发明人: Yaojian Lin , Kang Chen
- 申请人： Yaojian Lin , Kang Chen
- 申请人地址： SG Singapore
- 专利权人： STATS CHIPPAC, LTD.
- 当前专利权人： STATS CHIPPAC, LTD.
- 当前专利权人地址： SG Singapore
- 主分类号： H01L23/522
- IPC分类号： H01L23/522 ; H01L21/60 ; H01L21/56
摘要：
A semiconductor device has a temporary carrier. A semiconductor die is oriented with an active surface toward, and mounted to, the temporary carrier. An encapsulant is deposited with a first surface over the temporary carrier and a second surface, opposite the first surface, is deposited over a backside of the semiconductor die. The temporary carrier is removed. A portion of the encapsulant in a periphery of the semiconductor die is removed to form an opening in the first surface of the encapsulant. An interconnect structure is formed over the active surface of the semiconductor die and extends into the opening in the encapsulant layer. A via is formed and extends from the second surface of the encapsulant to the opening. A first bump is formed in the via and electrically connects to the interconnect structure.
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