发明申请
US20110284950A1 Method for fabricating a shallow and narrow trench FETand related structures
有权
制造浅沟槽窄沟槽FET及相关结构的方法
- 专利标题: Method for fabricating a shallow and narrow trench FETand related structures
- 专利标题(中): 制造浅沟槽窄沟槽FET及相关结构的方法
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申请号: US12800662申请日: 2010-05-20
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公开(公告)号: US20110284950A1公开(公告)日: 2011-11-24
- 发明人: Timothy D. Henson , Ling Ma , Hugo Burke , David P. Jones , Kapil Kelkar , Niraj Ranjan
- 申请人: Timothy D. Henson , Ling Ma , Hugo Burke , David P. Jones , Kapil Kelkar , Niraj Ranjan
- 申请人地址: US CA EL SEGUNDO
- 专利权人: INTERNATIONAL RECTIFIER CORPORATION
- 当前专利权人: INTERNATIONAL RECTIFIER CORPORATION
- 当前专利权人地址: US CA EL SEGUNDO
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L21/336
摘要:
Disclosed is a method for fabricating a shallow and narrow trench field-effect transistor (trench FET). The method includes forming a trench within a semiconductor substrate of a first conductivity type, the trench including sidewalls and a bottom portion. The method further includes forming a substantially uniform gate dielectric in the trench, and forming a gate electrode within said trench and over said gate dielectric. The method also includes doping the semiconductor substrate to form a channel region of a second conductivity type after forming the trench. In one embodiment, the doping step is performed after forming the gate dielectric and after forming the gate electrode. In another embodiment, the doping step is performed after forming the gate dielectric, but prior to forming the gate electrode. Structures formed by the invention's method are also disclosed.
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