发明申请
US20110296114A1 ATOMIC EXECUTION OVER ACCESSES TO MULTIPLE MEMORY LOCATIONS IN A MULTIPROCESSOR SYSTEM
有权
在多处理器系统中访问多个存储器位置的原子执行
- 专利标题: ATOMIC EXECUTION OVER ACCESSES TO MULTIPLE MEMORY LOCATIONS IN A MULTIPROCESSOR SYSTEM
- 专利标题(中): 在多处理器系统中访问多个存储器位置的原子执行
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申请号: US12786787申请日: 2010-05-25
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公开(公告)号: US20110296114A1公开(公告)日: 2011-12-01
- 发明人: Mark S. Farrell , Jonathan T. Hsieh , Christian Jacobi , Timothy J. Slegel
- 申请人: Mark S. Farrell , Jonathan T. Hsieh , Christian Jacobi , Timothy J. Slegel
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: G06F12/08
- IPC分类号: G06F12/08
摘要:
A method and central processing unit supporting atomic access of shared data by a sequence of memory access operations. A processor status flag is reset. A processor executes, subsequent to the setting of the processor status flag, a sequence of program instructions with instructions accessing a subset of shared data contained within its local cache. During execution of the sequence of program instructions and in response to a modification by another processor of the subset of shared data, the processor status flag is set. Subsequent to the executing the sequence of program instructions and based upon the state of the processor status flag, either a first program processing or a second program processing is executed. In some examples the first program processing includes storing results data into the local cache and the second program processing includes discarding the results data.