发明申请
US20110298507A1 SYSTEM AND METHOD FOR CALIBRATING OUTPUT FREQUENCY IN PHASE LOCKED LOOP 有权
用于校准相位锁定环路中的输出频率的系统和方法

SYSTEM AND METHOD FOR CALIBRATING OUTPUT FREQUENCY IN PHASE LOCKED LOOP
摘要:
A Digital Calibration System for a Phase Locked Loop includes a Tuning Voltage Controller configured to set the tuning voltage to a value; a Phase Difference Quantizer configured to output a phase difference after comparing a phase of the reference signal with a phase of the feedback signal; a Digital Controller configured to receive the phase difference of the PDQ and control a coarse tuning signal such that an average phase difference of the PDQ is 0; and a Frequency Calibration Logic configured to calibrate the feedback signal in response to the output of the DC.
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