Invention Application
- Patent Title: METHODS OF FABRICATING SEMICONDUCTOR DEVICES HAVING VARIOUS ISOLATION REGIONS
- Patent Title (中): 制备各种分离区域的半导体器件的方法
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Application No.: US13162050Application Date: 2011-06-16
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Publication No.: US20120034757A1Publication Date: 2012-02-09
- Inventor: Yong-Soon Choi , Jun-Won Lee , Gil-Heyun Choi , Eunkee Hong , Hong-Gun Kim , Ha-Young Yi
- Applicant: Yong-Soon Choi , Jun-Won Lee , Gil-Heyun Choi , Eunkee Hong , Hong-Gun Kim , Ha-Young Yi
- Applicant Address: KR Suwon-si
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Suwon-si
- Priority: KR10-2010-0075693 20100805
- Main IPC: H01L21/762
- IPC: H01L21/762

Abstract:
A method of fabricating a semiconductor device includes forming a first trench and a second trench in a semiconductor substrate, forming a first insulator to completely fill the first trench, the first insulator covering a bottom surface and lower sidewalls of the second trench and exposing upper sidewalls of the second trench, and forming a second insulator on the first insulator in the second trench.
Public/Granted literature
- US08530329B2 Methods of fabricating semiconductor devices having various isolation regions Public/Granted day:2013-09-10
Information query
IPC分类: