Invention Application
US20120054564A1 Method and apparatus to test memory using a regeneration mechanism
审中-公开
使用再生机制测试记忆体的方法和装置
- Patent Title: Method and apparatus to test memory using a regeneration mechanism
- Patent Title (中): 使用再生机制测试记忆体的方法和装置
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Application No.: US12807134Application Date: 2010-08-27
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Publication No.: US20120054564A1Publication Date: 2012-03-01
- Inventor: Abhishek Kumar Tiwary , Anubhav Singh , Anuj Verma , Arnab Bhattacharya
- Applicant: Abhishek Kumar Tiwary , Anubhav Singh , Anuj Verma , Arnab Bhattacharya
- Main IPC: G11C29/04
- IPC: G11C29/04 ; G06F11/22

Abstract:
A method and a system for testing memory blocks using a built-in-self-test (BIST) block using a regeneration mechanism. The method includes generation of a test pattern by executing a pre-defined algorithm to test a memory address of a memory block. The test pattern is stored at the memory address, and then the stored data is read from the memory address. The read data is send to a comparator for comparison with a background data. The background data corresponds to the test pattern and is regenerated by a regeneration block corresponding to clock cycles taken for storing the test pattern in the memory address. The stored data is read from the memory address. The comparator generates a validity signal based on the comparison of the background data with the read data.
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