Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms
    1.
    发明申请
    Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms 有权
    用于优化地址生成的方法和装置,用于同时运行基于邻近度的BIST算法

    公开(公告)号:US20110209012A1

    公开(公告)日:2011-08-25

    申请号:US12930082

    申请日:2010-12-24

    IPC分类号: G11C29/12 G06F11/27

    CPC分类号: G11C29/18 G11C2029/3602

    摘要: The invention discloses a method and a system for optimizing address generation for simultaneously running proximity-based Built-In-Self-Test (BIST) algorithms. The method also describes simultaneously testing proximity-based faults for different memories having column multiplexers of different sizes using the BIST algorithms. The system described above may be embodied in the form of a Built-In-Self-Test (BIST) controller. Further, the method includes selecting a memory having the largest size of column multiplexer (CMmax). After selecting the memory, size of an address-width register is extended to form an extended address-width register. Thereafter, an extended width address is generated using the extended address-width register and the extended width address is used to generate addresses for the memories. After generating the addresses, read and write operations are performed on the memories based on pre-defined rules, wherein the read and write operations provide testing of the memories.

    摘要翻译: 本发明公开了一种用于优化地址产生的方法和系统,用于同时运行基于邻近度的内置自测(BIST)算法。 该方法还描述了使用BIST算法同时测试具有不同大小的列多路复用器的不同存储器的基于接近度的故障。 上述系统可以以内置自测(BIST)控制器的形式实现。 此外,该方法包括选择具有最大尺寸的列多路复用器(CMmax)的存储器。 选择存储器后,扩展地址宽度寄存器的大小,形成扩展地址宽度寄存器。 此后,使用扩展地址宽度寄存器生成扩展宽度地址,并且扩展宽度地址用于生成存储器的地址。 在产生地址之后,基于预定义的规则对存储器执行读取和写入操作,其中读取和写入操作提供对存储器的测试。

    Method and apparatus to test memory using a regeneration mechanism
    2.
    发明申请
    Method and apparatus to test memory using a regeneration mechanism 审中-公开
    使用再生机制测试记忆体的方法和装置

    公开(公告)号:US20120054564A1

    公开(公告)日:2012-03-01

    申请号:US12807134

    申请日:2010-08-27

    IPC分类号: G11C29/04 G06F11/22

    CPC分类号: G11C29/36 G11C29/16

    摘要: A method and a system for testing memory blocks using a built-in-self-test (BIST) block using a regeneration mechanism. The method includes generation of a test pattern by executing a pre-defined algorithm to test a memory address of a memory block. The test pattern is stored at the memory address, and then the stored data is read from the memory address. The read data is send to a comparator for comparison with a background data. The background data corresponds to the test pattern and is regenerated by a regeneration block corresponding to clock cycles taken for storing the test pattern in the memory address. The stored data is read from the memory address. The comparator generates a validity signal based on the comparison of the background data with the read data.

    摘要翻译: 一种使用内置自检(BIST)块使用再生机制测试存储块的方法和系统。 该方法包括通过执行预定义的算法来测试存储器块的存储器地址来生成测试模式。 测试模式存储在存储器地址中,然后从存储器地址读取存储的数据。 将读取的数据发送到比较器以与背景数据进行比较。 背景数据对应于测试图案,并且由对应于将测试图案存储在存储器地址中的时钟周期的再生块再生。 存储的数据从存储器地址读取。 比较器基于背景数据与读取数据的比较产生有效性信号。

    Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms
    3.
    发明授权
    Method and apparatus for optimizing address generation for simultaneously running proximity-based BIST algorithms 有权
    用于优化地址生成的方法和装置,用于同时运行基于邻近度的BIST算法

    公开(公告)号:US08448030B2

    公开(公告)日:2013-05-21

    申请号:US12930082

    申请日:2010-12-24

    IPC分类号: H03M13/00

    CPC分类号: G11C29/18 G11C2029/3602

    摘要: The invention discloses a method and a system for optimizing address generation for simultaneously running proximity-based Built-In-Self-Test (BIST) algorithms. The method also describes simultaneously testing proximity-based faults for different memories having column multiplexers of different sizes using the BIST algorithms. The system described above may be embodied in the form of a Built-In-Self-Test (BIST) controller. Further, the method includes selecting a memory having the largest size of column multiplexer (CMmax). After selecting the memory, size of an address-width register is extended to form an extended address-width register. Thereafter, an extended width address is generated using the extended address-width register and the extended width address is used to generate addresses for the memories. After generating the addresses, read and write operations are performed on the memories based on pre-defined rules, wherein the read and write operations provide testing of the memories.

    摘要翻译: 本发明公开了一种用于优化地址产生的方法和系统,用于同时运行基于邻近度的内置自测(BIST)算法。 该方法还描述了使用BIST算法同时测试具有不同大小的列复用器的不同存储器的基于接近度的故障。 上述系统可以以内置自测(BIST)控制器的形式实现。 此外,该方法包括选择具有最大尺寸的列多路复用器(CMmax)的存储器。 选择存储器后,扩展地址宽度寄存器的大小,形成扩展地址宽度寄存器。 此后,使用扩展地址宽度寄存器生成扩展宽度地址,并且扩展宽度地址用于生成存储器的地址。 在产生地址之后,基于预定义的规则对存储器执行读取和写入操作,其中读取和写入操作提供对存储器的测试。