发明申请
- 专利标题: DIGITAL PHASE-LOCKED LOOP
- 专利标题(中): 数字锁相环
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申请号: US12875337申请日: 2010-09-03
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公开(公告)号: US20120056653A1公开(公告)日: 2012-03-08
- 发明人: Sanjeev MAHESHWARI , Emerson FANG
- 申请人: Sanjeev MAHESHWARI , Emerson FANG
- 申请人地址: US CA Sunnyvale
- 专利权人: ADVANCED MICRO DEVICES, INC.
- 当前专利权人: ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址: US CA Sunnyvale
- 主分类号: H03L7/08
- IPC分类号: H03L7/08
摘要:
Apparatus, systems and methods are provided for digital phase-locked loops. A digital phase-locked loop comprises an oscillator module configured to generate an output signal and a phase detection module coupled to the oscillator module. The phase detection module is configured to signal the oscillator module to adjust a frequency of the output signal by a first amount when a phase difference between a reference signal and the output signal is less than a threshold amount, and signal the oscillator module to adjust the frequency by a greater amount when the phase difference is greater than the threshold amount.
公开/授权文献
- US08269533B2 Digital phase-locked loop 公开/授权日:2012-09-18
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