发明申请
- 专利标题: DIGITAL PHASE DETECTOR AND DIGITAL PHASE-LOCKED LOOP
- 专利标题(中): 数字相位检测器和数字相位锁定环
-
申请号: US13071569申请日: 2011-03-25
-
公开(公告)号: US20120069884A1公开(公告)日: 2012-03-22
- 发明人: Hiroki Sakurai
- 申请人: Hiroki Sakurai
- 专利权人: KABUSHIKI KAISHA TOSHIBA
- 当前专利权人: KABUSHIKI KAISHA TOSHIBA
- 优先权: JP2010-211273 20100921
- 主分类号: H04B17/00
- IPC分类号: H04B17/00
摘要:
According to one embodiment, a digital phase detector includes a chain of delay devices configured to receive a reference signal through a first stage and delay the reference signal at each stage. The phase detector includes a sampler group configured to include a first sampler samples a first signal of N-phase input signals (N is an integer of at least 2) in accordance with the reference signal and a second sampler samples a second signal of N-phase input signals which lags behind the first signal in phase by 2π/N in accordance with an output signal from the first stage of the chain of delay devices. The phase detector includes a detection circuit configured to detect a time difference between an edge of the reference signal and an edge of the first signal based on sampled signals from the sampler group to convert the time difference into a phase difference.
信息查询