Invention Application
- Patent Title: SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR AND AN ELECTRICAL CONNECTION VIA, AND FABRICATION METHOD
- Patent Title (中): 包含电容器和电气连接的半导体器件,以及制造方法
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Application No.: US13298823Application Date: 2011-11-17
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Publication No.: US20120133021A1Publication Date: 2012-05-31
- Inventor: Sylvain Joblot , Alexy Farcy , Jean-Francois Carpentier , Pierre Bar
- Applicant: Sylvain Joblot , Alexy Farcy , Jean-Francois Carpentier , Pierre Bar
- Applicant Address: FR Crolles Cedex FR Montrouge
- Assignee: STMICROELECTRONICS (CROLLES 2) SAS,STMICROELECTRONICS S.A.
- Current Assignee: STMICROELECTRONICS (CROLLES 2) SAS,STMICROELECTRONICS S.A.
- Current Assignee Address: FR Crolles Cedex FR Montrouge
- Priority: FR1059919 20101130
- Main IPC: H01L29/92
- IPC: H01L29/92 ; H01L21/02

Abstract:
A main blind hole is formed in a front face of a wafer having a rear face. A through capacitor is formed in the main blind hole including a conductive outer electrode, a dielectric intermediate layer, and a filling conductive material forming an inner electrode. Cylindrical portions of the outer electrode, the dielectric intermediate layer and the inner electrode have front ends situated in a plane of the front face of the wafer. A secondary rear hole is formed in the rear face of the wafer to reveal a bottom of the outer electrode. A rear electrical connection is made to contact the bottom of the outer electrode through the secondary rear hole. A through hole via filled with a conductive material is provided adjacent the through capacitor. An electrical connection is made on the rear face between the rear electrical connection and the through hole via.
Public/Granted literature
- US08841749B2 Semiconductor device comprising a capacitor and an electrical connection via, and fabrication method Public/Granted day:2014-09-23
Information query
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