发明申请
- 专利标题： BIPOLAR TRANSISTOR INTEGRATED WITH METAL GATE CMOS DEVICES
- 专利标题（中）： 双极晶体管与金属栅CMOS集成器件集成
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申请号： US13370523申请日： 2012-02-10
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公开(公告)号： US20120139056A1公开(公告)日： 2012-06-07
- 发明人: Thomas A. Wallner , Ebenezer E. Eshun , Daniel J. Jaeger , Phung T. Nguyen
- 申请人： Thomas A. Wallner , Ebenezer E. Eshun , Daniel J. Jaeger , Phung T. Nguyen
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L27/06
- IPC分类号： H01L27/06
摘要：
A high-k gate dielectric layer and a metal gate layer are formed and patterned to expose semiconductor surfaces in a bipolar junction transistor region, while covering a CMOS region. A disposable material portion is formed on a portion of the exposed semiconductor surfaces in the bipolar junction transistor area. A semiconductor layer and a dielectric layer are deposited and patterned to form gate stacks including a semiconductor portion and a dielectric gate cap in the CMOS region and a cavity containing mesa over the disposable material portion in the bipolar junction transistor region. The disposable material portion is selectively removed and a base layer including an epitaxial portion and a polycrystalline portion fills the cavity formed by removal of the disposable material portion. The emitter formed by selective epitaxy fills the cavity in the mesa.
公开/授权文献
- US08569840B2 Bipolar transistor integrated with metal gate CMOS devices 公开/授权日：2013-10-29
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