Invention Application
- Patent Title: MODULAR LOW STRESS PACKAGE TECHNOLOGY
- Patent Title (中): 模块式低应力包技术
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Application No.: US13406722Application Date: 2012-02-28
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Publication No.: US20120158166A1Publication Date: 2012-06-21
- Inventor: Craig J. Rotay
- Applicant: Craig J. Rotay
- Applicant Address: US TX Coppell
- Assignee: STMICROELECTRONICS, INC.
- Current Assignee: STMICROELECTRONICS, INC.
- Current Assignee Address: US TX Coppell
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A method of designing a desired modular assembly: determining a package outline of a modular package assembly; determining seating plane and overall package length characteristics; calculating minimum package height of the modular package assembly; designing the dimensions and the configuration of semiconductor subassemblies by receiving semiconductor subassembly user input design data at the design tool, each semiconductor subassembly of the one or more semiconductor subassemblies comprising a modular sidewall element and a semiconductor substrate base element coupled to the modular sidewall element, the semiconductor substrate base element having at least one semiconductor element with a layout sized to be accommodated by modular dimensions of the modular sidewall element and the semiconductor substrate base element configured to form a base of the semiconductor subassembly; and incorporating the configuration and dimensions of the modular package assembly and the one or more semiconductor subassemblies into a manufacturing assembly process.
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