Invention Application
- Patent Title: TEMPLATE WAFER AND PROCESS FOR SMALL PITCH FLIP-CHIP INTERCONNECT HYBRIDIZATION
- Patent Title (中): 小型切片互补互连的模板波形和过程
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Application No.: US13414781Application Date: 2012-03-08
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Publication No.: US20120161314A1Publication Date: 2012-06-28
- Inventor: Justin K. Markunas , Eric F. Schulte
- Applicant: Justin K. Markunas , Eric F. Schulte
- Applicant Address: US VA Fort Belvoir
- Assignee: UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF THE ARMY
- Current Assignee: UNITED STATES OF AMERICA, AS REPRESENTED BY THE SECRETARY OF THE ARMY
- Current Assignee Address: US VA Fort Belvoir
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/768
Abstract:
A process is disclosed for high density indium bumping of microchips by using an innovative template wafer upon which the bumps are initially fabricated. Once fabricated, these bumps are transferred to the microchip, after which can be hybridized to another microchip. Such a template wafer is reusable, and thus provides an economical way to fabricate indium bumps. Reusability also eliminates nonuniformities in bump shape and size in serial processing of separate microchips, which is not the case for other indium bump fabrication processes. Such a fabrication process provides a way to form relatively tall indium bumps and accomplishes this without the standard thick photoresist liftoff process. The described process can be suitable for bump pitches under 10 microns, and is only limited by the resolution of the photolithography equipment used.
Public/Granted literature
- US08456004B2 Template wafer and process for small pitch flip-chip interconnect hybridization Public/Granted day:2013-06-04
Information query
IPC分类:
