A processor includes a computation unit; a storage unit storing a program; and a data transmission circuit that transmits to an operation monitoring unit a signal corresponding to an instruction for reporting the execution stage of the program. The operation monitoring unit: includes a transition operation identification. circuit and a loop processing identification circuit. The transition operation identification circuit receives a start ID instruction with an attached ID that identifies a task; a termination ID instruction that identifies termination of task operation; and if the task is execution of loop processing, a loop instruction that reports the maximum value of the number of times of this loop processing. The transition operation identification circuit identifies success of the transition operations of the tasks of the program, based on the ID instructions. The loop processing identification circuit identifies abnormality of the number of times of loop processing.