发明申请
US20120198166A1 Memory Attribute Sharing Between Differing Cache Levels of Multilevel Cache
有权
多级缓存的不同缓存级别之间的内存属性共享
- 专利标题： Memory Attribute Sharing Between Differing Cache Levels of Multilevel Cache
- 专利标题（中）： 多级缓存的不同缓存级别之间的内存属性共享
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申请号： US13247260申请日： 2011-09-28
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公开(公告)号： US20120198166A1公开(公告)日： 2012-08-02
- 发明人: Raguram Damodaran , Joseph Raymond Michael Zbiciak , Naveen Bhoria
- 申请人： Raguram Damodaran , Joseph Raymond Michael Zbiciak , Naveen Bhoria
- 申请人地址： US TX Dallas
- 专利权人： Texas Instruments Incorporated
- 当前专利权人： Texas Instruments Incorporated
- 当前专利权人地址： US TX Dallas
- 主分类号： G06F12/08
- IPC分类号： G06F12/08
摘要：
The level one memory controller maintains a local copy of the cacheability bit of each memory attribute register. The level two memory controller is the initiator of all configuration read/write requests from the CPU. Whenever a configuration write is made to a memory attribute register, the level one memory controller updates its local copy of the memory attribute register.
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