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    Asynchronous clock dividers to reduce on-chip variations of clock timing
    4.
    发明授权
    Asynchronous clock dividers to reduce on-chip variations of clock timing 有权
    异步时钟分频器可减少片上时钟时钟变化

    公开(公告)号：US08970267B2

    公开(公告)日：2015-03-03

    申请号：US12874627

    申请日：2010-09-02

    申请人： Raguram Damodaran ,  Abhijeet Ashok Chachad ,  Ramakrishnan Venkatasubramanian

    发明人： Raguram Damodaran ,  Abhijeet Ashok Chachad ,  Ramakrishnan Venkatasubramanian

    IPC分类号： H03K21/00 ,  H03K23/00 ,  H03K25/00 ,  H03K23/42

    CPC分类号： H03K25/00 ,  H03K23/42

    摘要： This invention is a means to definitively establish the occurrence of various clock edges used in a design, balancing clock edges at various locations within an integrated circuit. Clocks entering from outside sources can be a source of on-chip-variations (OCV) resulting in unacceptable clock edge skewing. The present invention arranges placement of the various clock dividers on the chip at remote locations where these clocks are used. This minimizes the uncertainty of the edge occurrence.

    摘要翻译： 本发明是明确地确定在设计中使用的各种时钟沿的发生的一种手段，平衡集成电路内的各个位置处的时钟沿。 从外部源进入的时钟可能是片上变化（OCV）的来源，导致不可接受的时钟边缘偏移。 本发明将各种时钟分频器布置在使用这些时钟的远程位置的芯片上。 这最小化边缘发生的不确定性。

    Process parameter based I/O timing programmability using electrical fuse elements
    10.
    发明授权
    Process parameter based I/O timing programmability using electrical fuse elements 有权
    使用电熔丝元件的基于工艺参数的I / O定时可编程性

    公开(公告)号：US07277808B1

    公开(公告)日：2007-10-02

    申请号：US11381425

    申请日：2006-05-03

    申请人： Raguram Damodaran ,  Manjeri Krishnan ,  Todd Beck

    发明人： Raguram Damodaran ,  Manjeri Krishnan ,  Todd Beck

    IPC分类号： G06F19/00

    CPC分类号： G06F17/5045 ,  G06F2217/62 ,  G06F2217/84

    摘要： Electrical fuses (eFuses) are applied to the task of achieving very tightly controlled Input-Output (I/O) timing specifications. The I/O timing is made programmable and subject to adjustment as part of wafer probe testing. The techniques of parametric adjustment presented are based upon what is commonly referred to as clock skewing or clock tuning. The invention describes methods to select the clock skewing on a die-to-die basis based on functional testing with the actual parametric limits imposed on parameters of interest. The results associated with each die form the basis for hard-programming the selected clock skew value into the die via electrical fuses.

    摘要翻译： 电气保险丝（eFuses）适用于实现非常严格控制的输入输出（I / O）时序规范的任务。 I / O定时可编程，可作为晶圆探针测试的一部分进行调整。 所提出的参数调整技术是基于通常称为时钟偏移或时钟调谐的。 本发明描述了基于功能测试来选择基于管芯到管芯的时钟偏移的方法，该功能测试具有施加在感兴趣的参数上的实际参数限制。 与每个芯片相关的结果构成了通过电熔丝将所选择的时钟偏移值硬编程到芯片中的基础。