发明申请
US20120214297A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING BURIED CHANNEL ARRAY TRANSISTOR 审中-公开
制造包含BURIED通道阵列晶体管的半导体器件的方法

  • 专利标题: METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING BURIED CHANNEL ARRAY TRANSISTOR
  • 专利标题(中): 制造包含BURIED通道阵列晶体管的半导体器件的方法
  • 申请号: US13351439
    申请日: 2012-01-17
  • 公开(公告)号: US20120214297A1
    公开(公告)日: 2012-08-23
  • 发明人: Kwan-Sik ChoDeok-Sung HwangKye-Hee Yeom
  • 申请人: Kwan-Sik ChoDeok-Sung HwangKye-Hee Yeom
  • 优先权: KR10-2011-0015630 20110222
  • 主分类号: H01L21/28
  • IPC分类号: H01L21/28
METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING BURIED CHANNEL ARRAY TRANSISTOR
摘要:
A method of fabricating a semiconductor device includes partially removing an active region and an isolation region to form a gate buried trench, forming a gate insulating layer on an inner wall of the gate buried trench, forming a gate conductive pattern on the gate insulating layer to fill the gate buried trench, and a height of an uppermost surface of the gate conductive pattern is lower than a height of an uppermost surface of the substrate. The method also includes forming an interlayer insulating layer on the substrate and on the gate conductive pattern, the interlayer insulating layer includes an upper insulating region and a lower insulating region, the lower insulating region fills the gate buried trench, the upper insulating region is formed over the substrate, and forming a bit contact plug connected to the active region through the interlayer.
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