发明申请
- 专利标题: LDMOS WITH IMPROVED BREAKDOWN VOLTAGE
- 专利标题(中): LDMOS具有改进的断电电压
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申请号: US13046313申请日: 2011-03-11
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公开(公告)号: US20120228695A1公开(公告)日: 2012-09-13
- 发明人: Eng Huat Toh , Jae Gon Lee , Chung Foong Tan , Elgin Quek
- 申请人: Eng Huat Toh , Jae Gon Lee , Chung Foong Tan , Elgin Quek
- 申请人地址: SG Singapore
- 专利权人: GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人: GLOBALFOUNDRIES Singapore Pte. Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H01L29/772
- IPC分类号: H01L29/772 ; H01L21/336
摘要:
An LDMOS is formed with a field plate over the n− drift region, coplanar with the gate stack, and having a higher work function than the gate stack. Embodiments include forming a first conductivity type well, having a source, surrounded by a second conductivity type well, having a drain, in a substrate, forming first and second coplanar gate stacks on the substrate over a portion of the first well and a portion of the second well, respectively, and tuning the work functions of the first and second gate stacks to obtain a higher work function for the second gate stack. Other embodiments include forming the first gate stack of a high-k metal gate and the second gate stack of a field plate on a gate oxide layer, forming the first and second gate stacks with different gate electrode materials on a common gate oxide, and forming the gate stacks separated from each other and with different gate dielectric materials.
公开/授权文献
- US08748271B2 LDMOS with improved breakdown voltage 公开/授权日:2014-06-10
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