发明申请
US20120230085A1 FORMING METHOD OF PERFORMING FORMING ON VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT, AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE 有权
形成可变电阻非易失性存储器元件和可变电阻非易失性存储器件的形成方法

  • 专利标题: FORMING METHOD OF PERFORMING FORMING ON VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT, AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE
  • 专利标题(中): 形成可变电阻非易失性存储器元件和可变电阻非易失性存储器件的形成方法
  • 申请号: US13511275
    申请日: 2011-09-28
  • 公开(公告)号: US20120230085A1
    公开(公告)日: 2012-09-13
  • 发明人: Ken KawaiKazuhiko ShimakawaKoji KatayamaShunsaku Muraoka
  • 申请人: Ken KawaiKazuhiko ShimakawaKoji KatayamaShunsaku Muraoka
  • 优先权: JP2010-216353 20100928
  • 国际申请: PCT/JP2011/005462 WO 20110928
  • 主分类号: G11C11/00
  • IPC分类号: G11C11/00
FORMING METHOD OF PERFORMING FORMING ON VARIABLE RESISTANCE NONVOLATILE MEMORY ELEMENT, AND VARIABLE RESISTANCE NONVOLATILE MEMORY DEVICE
摘要:
In forming, an automatic forming circuit (210) included in a nonvolatile memory device (200) causes a constant current IL to flow in a selected memory cell having a considerably high initial resistance. When the forming generates a filament path in the memory cell and thereby a resistance value is decreased, a potential of a node NBL and a potential of a node Nin are also decreased. If the potentials become lower than that of a reference voltage Vref, an output NO of a difference amplifier (303) for detecting forming success is activated, and a forming success signal Vfp is activated after a delay time depending on the number n of flip flops FF1 to FFn and a clock signal CLK. Thereby, a switch transistor (301) is in a non-conducting state and the forming on a variable resistance element is automatically terminated.
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