发明申请
US20120256271A1 Method and Apparatus for Modeling Multi-terminal MOS Device for LVS and PDK
有权
LVS和PDK多端MOS器件建模方法与装置
- 专利标题: Method and Apparatus for Modeling Multi-terminal MOS Device for LVS and PDK
- 专利标题(中): LVS和PDK多端MOS器件建模方法与装置
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申请号: US13081092申请日: 2011-04-06
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公开(公告)号: US20120256271A1公开(公告)日: 2012-10-11
- 发明人: Chau-Wen Wei , Cheng-Te Chang , Chin-yuan Huang , Chih Ming Yang , Yi-Kan Cheng
- 申请人: Chau-Wen Wei , Cheng-Te Chang , Chin-yuan Huang , Chih Ming Yang , Yi-Kan Cheng
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L27/06
- IPC分类号: H01L27/06 ; G06F17/50
摘要:
An apparatus comprises two n-type metal oxide semiconductor (MOS) devices formed next to each other. Each n-type MOS device further includes a pair of face-to-face diodes formed in an isolation ring. A method of modeling the apparatus comprises reusing four-terminal MOS device models in standard cell libraries and combining the four-terminal MOS device model and the isolation ring model into a 4T MOS plus isolation ring model. The method of modeling the apparatus further comprises adding a dummy device between a body contact of the first n-type MOS device and a body contact of the second n-type MOS device.
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