发明申请
US20120267800A1 Semiconductor Device and Method of Forming IPD in Fan-Out Wafer Level Chip Scale Package
有权
半导体器件和在扇出晶片级芯片级封装中形成IPD的方法
- 专利标题: Semiconductor Device and Method of Forming IPD in Fan-Out Wafer Level Chip Scale Package
- 专利标题(中): 半导体器件和在扇出晶片级芯片级封装中形成IPD的方法
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申请号: US13543088申请日: 2012-07-06
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公开(公告)号: US20120267800A1公开(公告)日: 2012-10-25
- 发明人: Yaojian Lin , Robert C. Frye , Pandi Chelvam Marimuthu , Kai Liu
- 申请人: Yaojian Lin , Robert C. Frye , Pandi Chelvam Marimuthu , Kai Liu
- 申请人地址: SG Singapore
- 专利权人: STATS ChipPAC, Ltd.
- 当前专利权人: STATS ChipPAC, Ltd.
- 当前专利权人地址: SG Singapore
- 主分类号: H01L25/16
- IPC分类号: H01L25/16 ; H01L23/522
摘要:
A semiconductor wafer contains semiconductor die. A first conductive layer is formed over the die. A resistive layer is formed over the die and first conductive layer. A first insulating layer is formed over the die and resistive layer. The wafer is singulated to separate the die. The die is mounted to a temporary carrier. An encapsulant is deposited over the die and carrier. The carrier and a portion of the encapsulant and first insulating layer is removed. A second insulating layer is formed over the encapsulant and first insulating layer. A second conductive layer is formed over the first and second insulating layers. A third insulating layer is formed over the second insulating layer and second conductive layer. A third conductive layer is formed over the third insulating layer and second conductive layer. A fourth insulating layer is formed over the third insulating layer and third conductive layer.
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