A capacitor array substrate includes a substrate, first traces, second traces, capacitors, connecting lines, and signal lines. The substrate has a first, a second, and a third side. The first side is connected with the second and the third side. The first traces are disposed on the substrate in parallel and are not vertical or parallel to the first side. The second traces are disposed on the substrate in parallel. The capacitors are disposed on the substrate at intersections of the first and the second traces and are connected to the first and the second traces. The connecting lines are disposed on the second and the third side of the substrate. Each connecting line is connected to a first and a second trace. The signal lines are disposed on the substrate. Each signal line is connected to a first or a second trace and transmits signals from the first side.