发明申请
- 专利标题: System and Method Providing Bandwidth Adjustment In Integral Path of Phase Locked Loop Circuitry
- 专利标题(中): 系统和方法在锁相环电路的积分路径中提供带宽调整
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申请号: US13543975申请日: 2012-07-09
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公开(公告)号: US20130027098A1公开(公告)日: 2013-01-31
- 发明人: Robert Wang , Antonios Pialis , Rajeevan Mahadevan , Navid Yaghini , Rafal Karakiewicz , Raymond Kwok Kei Tang , Sida Shen , Mark Andruchow , Zhuobin Li , Nicola Pantaleo
- 申请人: Robert Wang , Antonios Pialis , Rajeevan Mahadevan , Navid Yaghini , Rafal Karakiewicz , Raymond Kwok Kei Tang , Sida Shen , Mark Andruchow , Zhuobin Li , Nicola Pantaleo
- 主分类号: H03L7/08
- IPC分类号: H03L7/08
摘要:
A system incorporating and method of operating phase locked loop circuitry. In one embodiment, having programmable circuitry for adjustment of loop dynamics, a VCO has a first input terminal for selecting phase and frequency characteristics of an output signal and an output terminal on which the output signal is provided. A detector generates first VCO input signals indicative of phase and frequency differences between the VCO output signal and a reference signal. Circuitry digitizes the first VCO input signals and generates an integral path input signal therefrom. Slow integral path circuitry comprising, a first transistor device and a programmable low pass filter: receives the integral path input signal, and provides a low pass filtered version of the integral path input signal to control conduction through the first transistor device and provide a first adjustment signal for adjustment of the frequency of the VCO output signal.
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