发明申请
- 专利标题： Implementing Vector Memory Operations
- 专利标题（中）： 实现向量内存操作
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申请号： US13650403申请日： 2012-10-12
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公开(公告)号： US20130036268A1公开(公告)日： 2013-02-07
- 发明人: Roger Espasa , Joel Emer , Geoff Lowney , Roger Gramunt , Santiago Galan , Toni Juan , Jesus Corbal , Federico Ardanaz , Isaac Hernandez
- 申请人： Roger Espasa , Joel Emer , Geoff Lowney , Roger Gramunt , Santiago Galan , Toni Juan , Jesus Corbal , Federico Ardanaz , Isaac Hernandez
- 主分类号： G06F12/08
- IPC分类号： G06F12/08
摘要：
In one embodiment, the present invention includes an apparatus having a register file to store vector data, an address generator coupled to the register file to generate addresses for a vector memory operation, and a controller to generate an output slice from one or more slices each including multiple addresses, where the output slice includes addresses each corresponding to a separately addressable portion of a memory. Other embodiments are described and claimed.
公开/授权文献
- US08707012B2 Implementing vector memory operations 公开/授权日：2014-04-22
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