Invention Application
US20130037917A1 WAFER LEVEL CHIP SCALE PACKAGE WITH THICK BOTTOM METAL EXPOSED AND PREPARATION METHOD THEREOF 有权
带有底部金属薄膜的水平切片尺寸包装及其制备方法

  • Patent Title: WAFER LEVEL CHIP SCALE PACKAGE WITH THICK BOTTOM METAL EXPOSED AND PREPARATION METHOD THEREOF
  • Patent Title (中): 带有底部金属薄膜的水平切片尺寸包装及其制备方法
  • Application No.: US13602144
    Application Date: 2012-09-01
  • Publication No.: US20130037917A1
    Publication Date: 2013-02-14
  • Inventor: Yan Xun Xue
  • Applicant: Yan Xun Xue
  • Main IPC: H01L23/495
  • IPC: H01L23/495 H01L21/60
WAFER LEVEL CHIP SCALE PACKAGE WITH THICK BOTTOM METAL EXPOSED AND PREPARATION METHOD THEREOF
Abstract:
A method for forming a wafer level chip scale (WLCS) package device with a thick bottom metal comprising the step of attaching a lead frame comprising a plurality of thick bottom metals onto a back metal layer of a semiconductor wafer including a plurality of semiconductor chips having a plurality of bonding pads formed on a front surface of each chip, each thick bottom metal is aligned to a central portion of each chip; a plurality of back side cutting grooves are formed along the scribe lines and filled with a package material, the package material are cut through thus forming a plurality of singulated WLCS package devices.
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