- 专利标题: Through Silicon Via Keep Out Zone Formation Method and System
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申请号: US13302653申请日: 2011-11-22
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公开(公告)号: US20130049220A1公开(公告)日: 2013-02-28
- 发明人: Cheng-Chieh Hsieh , Hung-An Teng , Shang-Yun Hou , Shin-Puu Jeng
- 申请人: Cheng-Chieh Hsieh , Hung-An Teng , Shang-Yun Hou , Shin-Puu Jeng
- 申请人地址: TW Hsin-Chu
- 专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人: Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址: TW Hsin-Chu
- 主分类号: H01L23/48
- IPC分类号: H01L23/48
摘要:
Keep out zones (KOZ) are formed for a through silicon via (TSV). A device can be placed outside a first KOZ of a TSV determined by a first performance threshold so that a stress impact caused by the TSV to the device is less than a first performance threshold while the first KOZ contains only those points at which a stress impact caused by the TSV is larger than or equal to the first performance threshold. A second KOZ for the TSV can be similarly formed by a second performance threshold. A plurality of TSVs can be placed in a direction that the KOZ of the TSV has smallest radius to a center of the TSV, which may be in a crystal orientation [010] or [100]. A plurality of TSV stress plug can be formed at the boundary of the overall KOZ of the plurality of TSVs.
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