发明申请
US20130105869A1 METHOD OF FORMING GROUP III-V MATERIAL LAYER, SEMICONDUCTOR DEVICE INCLUDING THE GROUP III-V MATERIAL LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR LAYER
有权
形成III-V族材料层的方法,包括III-V族材料层的半导体器件,以及制造半导体层的方法
- 专利标题: METHOD OF FORMING GROUP III-V MATERIAL LAYER, SEMICONDUCTOR DEVICE INCLUDING THE GROUP III-V MATERIAL LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR LAYER
- 专利标题(中): 形成III-V族材料层的方法,包括III-V族材料层的半导体器件,以及制造半导体层的方法
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申请号: US13568555申请日: 2012-08-07
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公开(公告)号: US20130105869A1公开(公告)日: 2013-05-02
- 发明人: Sang-moon LEE , Young-jin CHO
- 申请人: Sang-moon LEE , Young-jin CHO
- 申请人地址: KR Suwon-si
- 专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人: SAMSUNG ELECTRONICS CO., LTD.
- 当前专利权人地址: KR Suwon-si
- 优先权: KR1020110112499 20111031
- 主分类号: H01L29/78
- IPC分类号: H01L29/78 ; H01L21/20 ; H01L21/336
摘要:
A method of forming a group III-V material layer, a semiconductor device including the group III-V material layer, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate; a group III-V channel layer formed on the substrate; a gate insulating layer formed on the group III-V channel layer; and a gate electrode and source and drain electrodes formed on the gate insulating layer, the source and drain electrodes having intervals from the gate electrode, wherein voids exist between a lower portion of the group III-V channel layer and an insulating layer. The group III-V channel layer may include a binary, ternary, or quaternary material.
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