SEMICONDUCTOR DEVICE INCLUDING GROUP III-V BARRIER AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING GROUP III-V BARRIER AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 有权
    包括III-V族阻挡层的半导体器件及制造半导体器件的方法

    公开(公告)号:US20130119347A1

    公开(公告)日:2013-05-16

    申请号:US13611127

    申请日:2012-09-12

    IPC分类号: H01L21/335 H01L29/775

    摘要: A semiconductor device including a group III-V barrier and a method of manufacturing the semiconductor device, the semiconductor device including: a substrate, insulation layers formed to be spaced apart on the substrate, a group III-V material layer for filling the space between the insulation layers and having a portion protruding higher than the insulation layers, a barrier layer for covering the side and upper surfaces of the protruding portion of the group III-V material layer and having a bandgap larger than that of the group III-V material layer, a gate insulation film for covering the surface of the barrier layer, a gate electrode formed on the gate insulation film, and source and drain electrodes formed apart from the gate electrode. The overall composition of the group III-V material layer is uniform. The barrier layer may include a group III-V material for forming a quantum well.

    摘要翻译: 一种包括III-V族阻挡层的半导体器件和制造半导体器件的方法,所述半导体器件包括:衬底,形成为在衬底上间隔开的绝缘层,用于填充所述衬底之间的空间的III-V族材料层 所述绝缘层具有比所述绝缘层突出的部分,用于覆盖所述III-V族材料层的所述突出部分的侧表面和上表面的阻挡层,并且具有比所述III-V族材料的带隙大的带隙 层,用于覆盖势垒层的表面的栅极绝缘膜,形成在栅极绝缘膜上的栅电极,以及与栅电极分开形成的源极和漏极。 III-V族材料层的总体组成是均匀的。 阻挡层可以包括用于形成量子阱的III-V族材料。

    SEMICONDUCTOR DEVICE INCLUDING GROUP III-V COMPOUND SEMICONDUCTOR LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE INCLUDING GROUP III-V COMPOUND SEMICONDUCTOR LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR DEVICE 审中-公开
    包括III-V族化合物半导体层的半导体器件及制造半导体器件的方法

    公开(公告)号:US20130105946A1

    公开(公告)日:2013-05-02

    申请号:US13593210

    申请日:2012-08-23

    IPC分类号: H01L29/20 H01L21/20

    摘要: A semiconductor device may include a silicon (Si) substrate including a hole, a hard mask around the hole on the Si substrate, a first material layer filling the hole and on a portion of the hard mask, an upper material layer on the first material layer, and a device layer on the upper material layer. The first material layer may be a Group III-V material layer. The Group III-V material layer may be a Group III-V compound semiconductor layer. The upper material layer may be a portion of the first material layer. The upper material layer may include one of a same material as the first material layer and a different material from the first material layer.

    摘要翻译: 半导体器件可以包括包括孔的硅(Si)衬底,围绕Si衬底上的孔的硬掩模,填充该孔的第一材料层和硬掩模的一部分上的第一材料层,第一材料上的上部材料层 层和上层材料层上的器件层。 第一材料层可以是III-V族材料层。 III-V族材料层可以是III-V族化合物半导体层。 上部材料层可以是第一材料层的一部分。 上部材料层可以包括与第一材料层相同的材料和与第一材料层不同的材料之一。

    SEMICONDUCTOR DEVICE USING GROUP III-V MATERIAL AND METHOD OF MANUFACTURING THE SAME
    6.
    发明申请
    SEMICONDUCTOR DEVICE USING GROUP III-V MATERIAL AND METHOD OF MANUFACTURING THE SAME 审中-公开
    使用III-V族材料的半导体器件及其制造方法

    公开(公告)号:US20130119507A1

    公开(公告)日:2013-05-16

    申请号:US13614303

    申请日:2012-09-13

    摘要: Semiconductor devices using a group III-V material, and methods of manufacturing the same, include a substrate having a groove, a group III-V material layer filling in the groove and having a height the same as a height of the substrate, a first semiconductor device on the group III-V material layer, and a second semiconductor device on the substrate near the groove. The group III-V material layer is spaced apart from inner side surfaces of the groove.

    摘要翻译: 使用III-V族材料的半导体器件及其制造方法包括:具有凹槽的衬底,填充在沟槽中的III-V族材料层,其高度与衬底的高度相同;第一 III-V族材料层上的半导体器件,以及靠近凹槽的衬底上的第二半导体器件。 III-V族材料层与槽的内侧表面间隔开。

    METHOD OF FORMING GROUP III-V MATERIAL LAYER, SEMICONDUCTOR DEVICE INCLUDING THE GROUP III-V MATERIAL LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR LAYER
    7.
    发明申请
    METHOD OF FORMING GROUP III-V MATERIAL LAYER, SEMICONDUCTOR DEVICE INCLUDING THE GROUP III-V MATERIAL LAYER, AND METHOD OF MANUFACTURING THE SEMICONDUCTOR LAYER 有权
    形成III-V族材料层的方法,包括III-V族材料层的半导体器件,以及制造半导体层的方法

    公开(公告)号:US20130105869A1

    公开(公告)日:2013-05-02

    申请号:US13568555

    申请日:2012-08-07

    摘要: A method of forming a group III-V material layer, a semiconductor device including the group III-V material layer, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate; a group III-V channel layer formed on the substrate; a gate insulating layer formed on the group III-V channel layer; and a gate electrode and source and drain electrodes formed on the gate insulating layer, the source and drain electrodes having intervals from the gate electrode, wherein voids exist between a lower portion of the group III-V channel layer and an insulating layer. The group III-V channel layer may include a binary, ternary, or quaternary material.

    摘要翻译: 形成III-V族材料层的方法,包括III-V族材料层的半导体器件,以及制造半导体器件的方法。 半导体器件包括衬底; 形成在所述基板上的III-V沟道层; 形成在III-V沟道层上的栅极绝缘层; 以及形成在栅极绝缘层上的栅极电极和源极和漏极,源极和漏极具有与栅极电极的间隔,其中在III-V族沟道层的下部和绝缘层之间存在空隙。 III-V族沟道层可以包括二元,三元或四元材料。