发明申请
- 专利标题: SELECTIVE PARTIAL GATE STACK FOR IMPROVED DEVICE ISOLATION
- 专利标题(中): 用于改进设备隔离的选择性部分门锁
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申请号: US13298783申请日: 2011-11-17
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公开(公告)号: US20130126976A1公开(公告)日: 2013-05-23
- 发明人: Xiaojun Yu , Dureseti Chidambarrao , Brian J. Greene , Yue Liang
- 申请人: Xiaojun Yu , Dureseti Chidambarrao , Brian J. Greene , Yue Liang
- 申请人地址: US NY Armonk
- 专利权人: International Business Machines Corporation
- 当前专利权人: International Business Machines Corporation
- 当前专利权人地址: US NY Armonk
- 主分类号: H01L27/092
- IPC分类号: H01L27/092 ; H01L21/8238
摘要:
A complementary metal oxide semiconductor (CMOS) device that may include a substrate having a first active region and a second active region that are separated from one another by an isolation region. An n-type semiconductor device is present on the first active region that includes a first gate structure having a first gate dielectric layer and an n-type work function metal layer, wherein the n-type work function layer does not extend onto the isolation region. A p-type semiconductor device is present on the second active region that includes a second gate structure having a second gate dielectric layer and a p-type work function metal layer, wherein the p-type work function layer does not extend onto the isolation region. A connecting gate structure extends across the isolation region into direct contact with the first gate structure and the second gate structure.
公开/授权文献
- US08466496B2 Selective partial gate stack for improved device isolation 公开/授权日:2013-06-18