发明申请
- 专利标题： SYSTEM ERROR ANALYSIS METHOD AND THE DEVICE USING THE SAME
- 专利标题（中）： 系统误差分析方法和使用该装置的装置
-
申请号： US13433556申请日： 2012-03-29
-
公开(公告)号： US20130166957A1公开(公告)日： 2013-06-27
- 发明人: Chia-Hsiang Chen
- 申请人： Chia-Hsiang Chen
- 申请人地址： TW Taipei
- 专利权人： INVENTEC CORPORATION
- 当前专利权人： INVENTEC CORPORATION
- 当前专利权人地址： TW Taipei
- 优先权： TW100147789 20111221
- 主分类号： G06F11/07
- IPC分类号： G06F11/07
摘要：
A system error analysis device which includes a top unit and a storage unit coupled to the top module is mentioned. The storage unit is configured to store each of the input data, each of the output data and each of the bus data transmitted by the top unit. When receiving an interrupting signal, the system error analysis device outputs the input data, the output data and the bus data stored as soon as the interrupting signal is received and the input data, the output data and the bus data stored before the receiving of the interrupting signal. Accordingly, by comparing and analyzing the data output by system error analysis device, the system employing the system error analysis device is able to obtain the reason of the generation of the interrupting signal.
公开/授权文献
- US08726089B2 System error analysis method and the device using the same 公开/授权日：2014-05-13
信息查询
