发明申请
- 专利标题: SPLIT DEEP POWER DOWN OF I/O MODULE
- 专利标题(中): 分离深度I / O模块的电源
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申请号: US13342023申请日: 2011-12-31
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公开(公告)号: US20130173902A1公开(公告)日: 2013-07-04
- 发明人: Inder M. Sodhi , Amjad M. Khan , Zeev Offen , Ryan D. Wells
- 申请人: Inder M. Sodhi , Amjad M. Khan , Zeev Offen , Ryan D. Wells
- 主分类号: G06F1/26
- IPC分类号: G06F1/26 ; G06F9/00
摘要:
I/O logic can be separated into critical and non-critical portions, with the non-critical portions being powered down during processor idle. The I/O logic is separated into gate logic and ungated logic, where the ungated logic continues to be powered during a processor deep sleep state, and the gated logic is powered off during the deep sleep state. A power control unit can trigger the shutting down of the I/O logic.
公开/授权文献
- US08954771B2 Split deep power down of I/O module 公开/授权日:2015-02-10