发明申请
- 专利标题: Processor to Execute Shift Right Merge Instructions
- 专利标题(中): 处理器执行右移合并指令
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申请号: US13843521申请日: 2013-03-15
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公开(公告)号: US20130212359A1公开(公告)日: 2013-08-15
- 发明人: Julien Sebot , William W. Macy, JR. , Eric L. Debes , Huy V. Nguyen
- 申请人: Julien Sebot , William W. Macy, JR. , Eric L. Debes , Huy V. Nguyen
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
Method, apparatus, and program means for performing bitstream buffer manipulation with a SIMD merge instruction. The method of one embodiment comprises determining whether any unprocessed data bits for a partial variable length symbol exist in a first data block is made. A shift merge operation is performed to merge the unprocessed data bits from the first data block with a second data block. A merged data block is formed. A merged variable length symbol comprised of the unprocessed data bits and a plurality of data bits from the second data block is extracted from the merged data block.
公开/授权文献
- US09218184B2 Processor to execute shift right merge instructions 公开/授权日:2015-12-22
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