发明申请
US20130221438A1 HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE AND LAYOUT PATTERN THEREOF
有权
高电压金属氧化物半导体晶体管器件及其布局图案
- 专利标题： HIGH VOLTAGE METAL-OXIDE-SEMICONDUCTOR TRANSISTOR DEVICE AND LAYOUT PATTERN THEREOF
- 专利标题（中）： 高电压金属氧化物半导体晶体管器件及其布局图案
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申请号： US13407722申请日： 2012-02-28
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公开(公告)号： US20130221438A1公开(公告)日： 2013-08-29
- 发明人: Ming-Tsung Lee , Cheng-Hua Yang , Wen-Fang Lee , Chih-Chung Wang , Chih-Wei Hsu , Po-Ching Chuang
- 申请人： Ming-Tsung Lee , Cheng-Hua Yang , Wen-Fang Lee , Chih-Chung Wang , Chih-Wei Hsu , Po-Ching Chuang
- 主分类号： H01L29/78
- IPC分类号： H01L29/78
摘要：
A layout pattern of a high voltage metal-oxide-semiconductor transistor device includes a first doped region having a first conductivity type, a second doped region having the first conductivity type, and an non-continuous doped region formed in between the first doped region and the second doped region. The non-continuous doped region includes a plurality of gaps formed therein. The non-continuous doped region further includes a second conductivity type complementary to the first conductivity type.
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