A gate driver includes a plurality of driving units each including a first sub driving unit and a second sub driving unit, wherein output terminals of the first and second sub driving units are connected to first and second sub gate lines, respectively, and first and second sub outputs that are the outputs of the first and second sub driving units are respectively transferred to gate terminals of a first switching transistor and a second switching transistor formed in a pixel area of a display area, and wherein drain and source terminals of the first switching transistor are respectively connected to drain and source terminals of the second switching transistors.