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公开(公告)号：US10810920B2
公开(公告)日：2020-10-20
申请号：US14701097
申请日：2015-04-30
申请人： LG Display Co., Ltd.
发明人： Yong-Ho Jang
摘要： A shift register capable of preventing leakage current and a display device using the same are disclosed. The shift register includes a plurality of stages. Each stage includes a set unit setting a Q node in response to a start pulse or previous output, an inverter for controlling a QB node to have a logic state opposite to that of the Q node, an output unit for outputting any one input clock or a gate off voltage in response to the logic states of the Q and QB nodes, a reset unit including a reset switching element, the reset switching element resetting the Q node with a first reset voltage in response to a reset pulse or next output, and a noise cleaner resetting the Q node with a second reset voltage in response to the QB node. When the reset switching element is turned off, the first reset voltage is greater than a voltage of the reset pulse or the next output for the current.
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公开(公告)号：US10102793B2
公开(公告)日：2018-10-16
申请号：US15186107
申请日：2016-06-17
申请人： LG Display Co., Ltd.
发明人： Yong-Ho Jang , Woo-Seok Choi
IPC分类号： G09G3/20 , G02F1/1345 , G09G3/3266 , G09G3/36 , G11C19/28
摘要： Discussed are a built-in gate driver capable of improving output characteristics of the gate driver by reducing load of clock lines and a display device using the same. The built-in gate driver can include a shift register, a first clock group and a second clock group located in a non-display region of a display panel. The shift register includes a plurality of stages for individually driving gate lines of a display region. The first clock group includes clock lines arranged at a first side of the shift register. The second clock group includes clock lines arranged at a second side of the shift register. Each of the clock lines includes a main line and a branch line branched from the main line and connected to a corresponding stage. A branch line belonging to a corresponding clock group of any one of the first and second clock groups does not overlap a main line belonging to the other clock group.
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公开(公告)号：US08867697B2
公开(公告)日：2014-10-21
申请号：US13846478
申请日：2013-03-18
申请人： LG Display Co., Ltd.
发明人： Yong-Ho Jang , Seung-Chan Choi , Jae-Yong You , Woo-Seok Choi
CPC分类号： G11C19/00 , G09G3/3677 , G09G2310/0286 , G11C19/28
摘要： A shift register is provided in which leakage of charges from a voltage at a set node is prevented to stabilize an output from a stage. The shift register includes stages for sequentially outputting scan pulses. An nth one of the stages includes a node controller for controlling voltages at nodes, and an output unit for outputting any one of a corresponding one of the scan pulses and a first discharging voltage according to the voltages at the nodes. The nodes include set and reset nodes. The node controller of the nth stage includes a first switching device controlled by a voltage supplied to the reset node for supplying a second discharging voltage to the set node, and an inverter circuit controlled by a voltage supplied to the set node for supplying any one of a charging voltage and a third discharging voltage to the reset node.
摘要翻译： 提供了一种移位寄存器，其中防止电荷从设定节点处的电压泄漏以稳定级的输出。 移位寄存器包括用于顺序地输出扫描脉冲的级。 第n个阶段包括用于控制节点处的电压的节点控制器，以及用于根据节点处的电压输出扫描脉冲中的相应一个扫描脉冲和第一放电电压中的任何一个的输出单元。 节点包括设置和重置节点。 第n级的节点控制器包括由提供给复位节点的电压控制的第一开关装置，用于向设定节点提供第二放电电压;以及逆变器电路，由提供给设定节点的电压控制， 充电电压和第三放电电压到复位节点。
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公开(公告)号：US20130235004A1
公开(公告)日：2013-09-12
申请号：US13727251
申请日：2012-12-26
申请人： LG DISPLAY CO., LTD.
发明人： Yong-Ho Jang , Binn Kim , Hae-Yeol Kim , Bu-Yeol Lee
IPC分类号： G09G3/32
CPC分类号： G09G3/3275 , G09G3/3266
摘要： A gate driver includes a plurality of driving units each including a first sub driving unit and a second sub driving unit, wherein output terminals of the first and second sub driving units are connected to first and second sub gate lines, respectively, and first and second sub outputs that are the outputs of the first and second sub driving units are respectively transferred to gate terminals of a first switching transistor and a second switching transistor formed in a pixel area of a display area, and wherein drain and source terminals of the first switching transistor are respectively connected to drain and source terminals of the second switching transistors.
摘要翻译： 栅极驱动器包括多个驱动单元，每个驱动单元包括第一副驱动单元和第二副驱动单元，其中第一和第二副驱动单元的输出端分别连接到第一和第二子栅极线，第一和第二 作为第一和第二副驱动单元的输出的副输出分别被传送到形成在显示区域的像素区域中的第一开关晶体管和第二开关晶体管的栅极端子，并且其中第一开关的漏极和源极端子 晶体管分别连接到第二开关晶体管的漏极和源极端子。
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公开(公告)号：US08817943B2
公开(公告)日：2014-08-26
申请号：US13727245
申请日：2012-12-26
申请人： LG Display Co., Ltd.
发明人： Yong-Ho Jang
IPC分类号： G11C19/00
CPC分类号： G11C19/00 , G09G3/3266 , G09G2310/0286 , G11C19/28
摘要： A shift register includes a plurality of stages for sequentially outputting A-scan pulses and B-scan pulses. At least one of the stages includes an A-sub-stage for controlling a voltage at an A-set node and a voltage at at least one A-reset node in response to an external A-control signal and generating an A-carry pulse based on the voltage at the A-set node, the voltage at the A-reset node and any one A-clock pulse, a B-sub-stage for controlling a voltage at a B-set node and a voltage at at least one B-reset node in response to an external B-control signal and generating a B-carry pulse based on the voltage at the B-set node, the voltage at the B-reset node and any one B1-clock pulse, and a scan output controller for generating a corresponding one of the A-scan pulses and a corresponding one of the B-scan pulses.
摘要翻译： 移位寄存器包括用于顺序输出A扫描脉冲和B扫描脉冲的多个级。 所述级中的至少一个包括用于响应于外部A控制信号来控制A组节点处的电压和至少一个A复位节点处的电压的A子级，并产生A进位脉冲 基于A组节点处的电压，A复位节点处的电压和任何一个A时钟脉冲，用于控制B组节点处的电压的B级和至少一个电压 B复位节点，并且基于B组节点处的电压，B复位节点处的电压和任何一个B1时钟脉冲以及扫描来产生B进位脉冲 输出控制器，用于产生A扫描脉冲中的相应一个和相应的一个B扫描脉冲。
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公开(公告)号：US08755485B2
公开(公告)日：2014-06-17
申请号：US13945300
申请日：2013-07-18
申请人： LG Display Co., Ltd.
发明人： Yong-Ho Jang , Seung-Chan Choi
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3688 , G09G2310/0286 , G09G2310/0289 , G11C19/00
摘要： Disclosed herein is a shift register in which leakage of charges from a voltage at a set node is prevented to stabilize an output from a stage. The shift register includes a plurality of stages for sequentially outputting scan pulses. Each stage includes a node controller for controlling signal states of a set node and a reset node, and an output unit supplied with any one of a plurality of clock pulses having different phases. The output unit outputs the supplied clock pulse as a scan pulse through an output terminal thereof according to the signal states of the set node and reset node. The node controller includes a first discharging switching device which is turned on or off in response to a scan pulse from a downstream stage. The first discharging switching device is connected between any one of a plurality of clock transfer lines and the set node.
摘要翻译： 这里公开了一种移位寄存器，其中阻止了来自设定节点处的电压的电荷泄漏以稳定级的输出。 移位寄存器包括用于顺序地输出扫描脉冲的多个级。 每个级包括用于控制设定节点和复位节点的信号状态的节点控制器，以及提供有具有不同相位的多个时钟脉冲中的任何一个的输出单元。 输出单元根据设定节点和复位节点的信号状态，通过其输出端输出所提供的时钟脉冲作为扫描脉冲。 节点控制器包括响应于来自下游级的扫描脉冲而导通或关断的第一放电开关器件。 第一放电开关装置连接在多个时钟传输线中的任何一个和设定节点之间。
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公开(公告)号：US20140072092A1
公开(公告)日：2014-03-13
申请号：US13727245
申请日：2012-12-26
申请人： LG DISPLAY CO., LTD.
发明人： Yong-Ho Jang
IPC分类号： G11C19/00
CPC分类号： G11C19/00 , G09G3/3266 , G09G2310/0286 , G11C19/28
摘要： A shift register includes a plurality of stages for sequentially outputting A-scan pulses and B-scan pulses. At least one of the stages includes an A-sub-stage for controlling a voltage at an A-set node and a voltage at at least one A-reset node in response to an external A-control signal and generating an A-carry pulse based on the voltage at the A-set node, the voltage at the A-reset node and any one A-clock pulse, a B-sub-stage for controlling a voltage at a B-set node and a voltage at at least one B-reset node in response to an external B-control signal and generating a B-carry pulse based on the voltage at the B-set node, the voltage at the B-reset node and any one B1-clock pulse, and a scan output controller for generating a corresponding one of the A-scan pulses and a corresponding one of the B-scan pulses.
摘要翻译： 移位寄存器包括用于顺序输出A扫描脉冲和B扫描脉冲的多个级。 所述级中的至少一个包括用于响应于外部A控制信号来控制A组节点处的电压和至少一个A复位节点处的电压的A子级，并产生A进位脉冲 基于A组节点处的电压，A复位节点处的电压和任何一个A时钟脉冲，用于控制B组节点处的电压的B级和至少一个电压 B复位节点，并且基于B组节点处的电压，B复位节点处的电压和任何一个B1时钟脉冲以及扫描来产生B进位脉冲 输出控制器，用于产生A扫描脉冲中的相应一个和相应的一个B扫描脉冲。
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公开(公告)号：US20140022045A1
公开(公告)日：2014-01-23
申请号：US13945300
申请日：2013-07-18
申请人： LG DISPLAY CO., LTD.
发明人： Yong-Ho Jang , Seung-Chan Choi
IPC分类号： G11C19/00
CPC分类号： G11C19/28 , G09G3/3688 , G09G2310/0286 , G09G2310/0289 , G11C19/00
摘要： Disclosed herein is a shift register in which leakage of charges from a voltage at a set node is prevented to stabilize an output from a stage. The shift register includes a plurality of stages for sequentially outputting scan pulses. Each stage includes a node controller for controlling signal states of a set node and a reset node, and an output unit supplied with any one of a plurality of clock pulses having different phases. The output unit outputs the supplied clock pulse as a scan pulse through an output terminal thereof according to the signal states of the set node and reset node. The node controller includes a first discharging switching device which is turned on or off in response to a scan pulse from a downstream stage. The first discharging switching device is connected between any one of a plurality of clock transfer lines and the set node.
摘要翻译： 这里公开了一种移位寄存器，其中阻止了来自设定节点处的电压的电荷泄漏以稳定级的输出。 移位寄存器包括用于顺序地输出扫描脉冲的多个级。 每个级包括用于控制设定节点和复位节点的信号状态的节点控制器，以及提供有具有不同相位的多个时钟脉冲中的任何一个的输出单元。 输出单元根据设定节点和复位节点的信号状态，通过其输出端输出所提供的时钟脉冲作为扫描脉冲。 节点控制器包括响应于来自下游级的扫描脉冲而导通或关断的第一放电开关装置。 第一放电开关装置连接在多个时钟传输线中的任何一个和设定节点之间。
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公开(公告)号：US09384853B2
公开(公告)日：2016-07-05
申请号：US14140776
申请日：2013-12-26
申请人： LG DISPLAY CO., LTD.
发明人： Yong-Ho Jang
CPC分类号： G11C19/28 , G09G3/3266 , G09G2310/0286
摘要： A shift register includes a plurality of stages each outputting k composite pulses each including an A-scan pulse and a B-scan pulse. At least one stage includes an A-sub-stage for controlling a voltage at an A-set node and a voltage at at least one A-reset node in response to an external A-control signal and generating an A-carry pulse based on the voltage at the A-set node. The voltage at the at least one A-reset node and any one A-clock pulse, at least one B-sub-stage for controlling a voltage at a B-set node and a voltage at at least one B-reset node in response to an external B-control signal and generating a B-carry pulse, and a scan output controller for generating k A-scan pulses and k B-scan pulses and outputting one of the A-scan pulses and one of the B-scan pulses corresponding to each other as one composite pulse.
摘要翻译： 移位寄存器包括多个级，每个级输出包括A扫描脉冲和B扫描脉冲的k个复合脉冲。 至少一级包括用于响应于外部A控制信号控制A组节点处的电压和至少一个A复位节点处的电压的A子级，并且基于 A组节点处的电压。 在至少一个A复位节点处的电压和任何一个A时钟脉冲，至少一个用于控制B组节点处的电压的B级和响应中的至少一个B复位节点处的电压 一个外部B控制信号并产生一个B进位脉冲;一个扫描输出控制器，用于产生k个A扫描脉冲和k个B扫描脉冲，并输出一个A扫描脉冲和一个B扫描脉冲 对应于一个复合脉冲。
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公开(公告)号：US09293222B2
公开(公告)日：2016-03-22
申请号：US14308577
申请日：2014-06-18
申请人： LG Display Co., Ltd.
发明人： Yong-Ho Jang , Cheol-Se Kim
CPC分类号： G11C19/28 , G09G2310/0286
摘要： Disclosed is a shift register capable of stably generating an output even when the threadhold voltage of a pull-down switching element is raised due to degradation of the pull-down switching element. The shift register includes a plurality of stages each comprising a node controller comprising an inverter to control a voltage at a reset node in accordance with a voltage at a set node, and an output unit to output a scan pulse based on at least one of the voltage at the set node and the voltage at the reset node. The shift register further includes an inverter voltage controller for controlling a high-level inverter voltage supplied to each inverter of the stages based on the voltage at at least one reset node in at least one of the stages.
摘要翻译： 公开了一种即使当下拉开关元件的螺纹保持电压由于下拉开关元件的劣化而升高时也能够稳定地产生输出的移位寄存器。 移位寄存器包括多个级，每个级包括节点控制器，该节点控制器包括根据设置节点处的电压来控制复位节点处的电压的反相器，以及输出单元，用于基于以下步骤中的至少一个来输出扫描脉冲： 设置节点处的电压和复位节点处的电压。 移位寄存器还包括逆变器电压控制器，用于基于至少一个级中的至少一个复位节点上的电压来控制提供给各级的每个反相器的高电平的反相器电压。
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