发明申请
US20130240903A1 METHOD AND SYSTEM FOR ULTRA MINIATURIZED PACKAGES FOR TRANSIENT VOLTAGE SUPPRESSORS
有权
用于瞬态电压抑制器的超小型封装的方法和系统
- 专利标题: METHOD AND SYSTEM FOR ULTRA MINIATURIZED PACKAGES FOR TRANSIENT VOLTAGE SUPPRESSORS
- 专利标题(中): 用于瞬态电压抑制器的超小型封装的方法和系统
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申请号: US13420056申请日: 2012-03-14
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公开(公告)号: US20130240903A1公开(公告)日: 2013-09-19
- 发明人: Avinash Srikrishnan Kashyap , Emad Andarawis Andarawis , David Mulford Shaddock
- 申请人: Avinash Srikrishnan Kashyap , Emad Andarawis Andarawis , David Mulford Shaddock
- 主分类号: H01L29/20
- IPC分类号: H01L29/20 ; H01L29/161 ; H01L21/50
摘要:
A method of forming a silicon carbide transient voltage suppressor (TVS) assembly and a system for a transient voltage suppressor (TVS) assembly are provided. The transient voltage suppressor (TVS) assembly includes a semiconductor die including a contact surface on a single side of the die, the die further including a substrate comprising a layer of at least one of an electrical insulator material, a semi-insulating material, and a first wide band gap semiconductor having a conductivity of a first polarity, at least a TVS device including a plurality of wide band gap semiconductor layers formed on the substrate; a first electrode coupled in electrical contact with the TVS device and extending to the contact surface, and a second electrode electrically coupled to the substrate extending to the contact surface.
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